1. Field of the Invention
The present invention relates generally to formation of a III-nitride material system device, and relates more particularly to a III-nitride material system device formed with an ohmic contact and a method for forming the contact with a residual passivation layer.
2. Description of Related Art
III-nitride semiconductors are presently known that exhibit a large dielectric breakdown field of greater than 2.2 MV/cm. III-nitride heterojunction structures are also capable of carrying extremely high currents, which makes devices fabricated in the III-nitride material system excellent for power applications.
Development of devices based on III-nitride materials has generally been aimed at high power-high frequency applications such as emitters for cell phone base stations. The devices fabricated for these types of applications are based on general device structures that exhibit high electron mobility and are referred to variously as heterojunction field effect transistors (HFETs), high electron mobility transistors (HEMTs) or modulation doped field effect transistors (MODFETs). These types of devices are typically able to withstand high voltages such as in the range of 100 Volts, while operating at high frequencies, typically in the range of 2-100 GHz. These types of devices may be modified for a number of types of applications, but typically operate through the use of piezoelectric polarization fields to generate a two dimensional electron gas (2DEG) that allows transport of very high current densities with very low resistive losses. The 2DEG is formed at an interface of AlGaN and GaN materials in these conventional III-nitride HEMT devices. Due to the nature of the AlGaN/GaN interface, and the formation of the 2DEG at the interface, devices that are formed in the III-nitride materials system tend to be nominally on, or depletion mode devices. The high electron mobility of the 2DEG at the interface of the AlGaN/GaN layers permits the III-nitride device, such as a HEMT device, to conduct without the application of a gate potential. The nominally on nature of the HEMT devices previously fabricated have limited their applicability to power management. The limitations of nominally on power devices is observed in the need to have a control circuit be powered and operational, before power can be safely controlled by a nominally on device. Accordingly, it would be desirable to create a III-nitride heterojunction device that is nominally off to avoid current conduction problems during start-up and other modes.
A drawback of III-nitride devices that permit high current densities with low resistive losses is the limited thickness that can be achieved in the strained AlGaN/GaN system. The difference in the lattice structures of these types of materials produces a strain that can result in dislocation of films grown to produce the different layers. This results in high levels of leakage through a barrier layer, for example. Some previous designs have focused on reducing the in-plane lattice constant of the AlGaN layer to near where the point of relaxation occurs to reduce the dislocation generation and leakage. However, the problem of limited thickness is not addressed by these designs.
Another solution is to add insulation layers to prevent leakage problems. The addition of an insulator layer can reduce the leakage through the barrier, and typical layers used for this purpose are silicon oxide, silicon nitride, saphire, or other insulators, disposed between the AlGaN and metal gate layers. This type of device is often referred to as a MISHFET and has some advantages over the traditional devices that do not have an insulator layer.
While additional insulator layers can permit thicker strained AlGaN/GaN systems to be constructed, the confinement layer produced by the additional insulator results in lower current carrying capacity due to the scattering effect produced on electrons at the GaN/insulator interface. Also, the additional interface between the AlGaN layer and the insulator results in the production of interface trap states that slow the response of the device. The additional thickness of the oxide, plus the additional interfaces between the two layers, also results in the use of larger gate drive voltages to switch the device.
Conventional device designs using nitride material to obtain nominally off devices rely on this additional insulator to act as a confinement layer, and may reduce or eliminate the top AlGaN layer. These devices, however, typically have lower current carrying capacity due to scattering at the GaN/insulator interface.
Accordingly, it would be desirable to produce a heterojunction device or FET that has a low leakage characteristic with fewer interfaces and layers that can still withstand high voltage and produce high current densities with low resistive losses. Presently, planar devices have been fabricated with GaN and AlGaN alloys through a number of techniques, including MOCVD (metal organic chemical vapor deposition) as well as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE).
Materials in the gallium nitride material system may include gallium nitride (GaN) and its alloys such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN) and indium aluminum gallium nitride (InAlGaN). These materials are semiconductor compounds that have a relatively wide direct bandgap that permits highly energetic electronic transitions to occur. Gallium nitride materials have been formed on a number of different substrates including silicon carbide (SiC), saphire and silicon. Silicon substrates are readily available and relatively inexpensive, and silicon processing technology has been well developed.
However, forming gallium nitride materials on silicon substrates to produce semiconductor devices presents challenges that arise from differences in the lattice constant, thermal expansion and bandgap between silicon and gallium nitride. The problems attendant with the lattice mismatch between GaN and traditional substrate materials are also prevalent in material layer structures involving GaN and GaN alloys. For example, GaN and AlGaN materials have lattice structures that differ significantly enough to produce interface strain between the layers, contributing to piezoelectric polarization. In many previous devices, the fields generated by the piezoelectric polarization are controlled to improve the characteristics of the devices. Variations in the content of aluminum in the AlGaN/GaN layer structures tends to vary the lattice mismatch between the materials to achieve different device characteristics, such as improved conductivity or isolation barriers.
A number of types of power devices can potentially benefit from a nominally off device with low on resistance. For example, it would desirable to obtain a power switch, power rectifier, synchronous rectifier, current control device or other power devices that are nominally off when no power is applied. Current control devices can include diodes, pinch resistors, Schottky diodes and the like.
Another feature of a power device that is desirable to improve or optimize is the breakdown voltage. Typically, high voltage switching devices produced from semiconductors are exposed to very high electric fields that can be the source of dielectric breakdown in the power devices. III-nitride material devices can be particularly vulnerable to dielectric breakdown failures due to the nature of formation of the devices in the III-nitride material system. During processing of III-nitride material devices, high temperature annealing steps or chemical treatments are frequently used to produce low resistance ohmic contacts that are connected to low or moderately doped semiconductor material. During the high temperature annealing steps, the surface of the semiconductor material being annealed loses nitrogen due to the volatile nature of near-surface nitrogen in a high temperature annealing environment. The loss of nitrogen from the semiconductor material results in vacancies in the material that produces an N-type dopant effect in this material system. The effect of the additional doping beyond the normal or expected doping of the semiconductor material surface layer produces increased electric fields near the surface region of the device during voltage blocking operations. For example, if the device is a field effect transistor in an off state, the device is expected to standoff potentially large voltages without breaking down. However, due to the greater than expected doping effect of the surface layer of the semiconductor material, and the attendant increased electrical fields in the surface region, lower breakdown voltages are observed, in conjunction with device failures.
One way to avoid the effective doping that occurs with the removal of nitrogen from the surface of the semiconductor material is to form a highly doped III-nitride material on a top surface of the semiconductor material prior to forming an ohmic contact. Once the ohmic contact metal is deposited and annealed, the highly doped material layer is etched away to expose the areas for formation of a gate and a drift region, for example. However, during the etching process the exposed material surface can suffer a number of detrimental effects that result in defects in the material. The defects produced by the etching process also produce a doping effect, in addition to detrimental effects on the interface density of states under the gate, for example.
Accordingly, it would be desirable to reduce or eliminate the nitrogen outdiffusion of the semiconductor material surface layer during high temperature annealing steps, to reduce or eliminate the high residual doping effect in semiconductor surface layers during formation of ohmic contacts.
It would also be desirable to obtain a device passivation that protects the surface of the semiconductor device to prevent surface breakdown. It would also be desirable to prevent field crowding effects that can typically result from the conventional processing techniques discussed above.